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1/12 march 2004 high speed: t pd = 15ns (typ.) at v cc =6v low power dissipation: i cc =4 a(max.) at t a =25c high noise immunity: v nih =v nil = 28% v cc (min.) symmetrical output impedance: |i oh |=i ol =4ma(min) balanced propagation delays: t plh ? t phl wide operating voltage range: v cc (opr) = 2v to 6v pin and function compatible with 54 series 165 space grade-1: esa scc qualified 50 krad qualified, 100 krad available on request no sel under high let heavy ions irradiation device fully compliant with scc-9306-042 description the m54hc165 is an high speed cmos 8 bit piso shift register fabricated with silicon gate c 2 mos technology. this device contains eight clocked master slave rs flip-flops connected as a shift register, with auxiliary gating to provide ove r-riding asynchronous parallel entry. parallel data enters when the shift/load input is low. the parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. for clocked operation, shift/load must be high. the two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate. to avoid double clocking, however, the inhibit signal should only go high while the clock is high. otherwise the rising inhibit signal will cause the same response as rising clock edge. all inputs are equipped with protection circuits against static discharge and transient excess voltage. m54hc165 rad-hard 8 bit piso shift register pin connection order codes package fm em dilc M54HC165D M54HC165D1 fpc m54hc165k m54hc165k1 dilc-16 fpc-16
m54hc165 2/12 iec logic symbols input and output equivalent circuit pin description truth table a........h : the level of steady input voltage at inputs a through respectively qan - qgn : the level of qa - qg, respectively. before the most-recent transition of the clock pin n symbol name and function 1 shift/load data inputs 2qh complementary output 7 qh serial output 9clock clock input (low to high, edge triggered 10 si serial data inputs 11, 12, 13, 14,3,4,5,6 a to h parallel data inputs 15 clock inh clock inhibit 8 gnd ground (0v) 16 v cc positive supply voltage inputs internal outputs outputs shift / load clock inh clock si a..........h qa qb qh l x x x a..........h a b h hl hxhqanqgn hl lxlqanqgn hlhxhqanqgn hllxlqanqgn hxhxx nochange hhxxx nochange
m54hc165 3/12 logic diagram timing chart
m54hc165 4/12 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied recommended operating conditions symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc +0.5 v v o dc output voltage -0.5 to v cc +0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 300 mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 265 c symbol parameter value unit v cc supply voltage 2to6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c t r ,t f input rise and fall time v cc =2.0v 0 to 1000 ns v cc =4.5v 0 to 500 ns v cc =6.0v 0 to 400 ns
m54hc165 5/12 dc specifications symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 i o =-20 a 1.9 2.0 1.9 1.9 v 4.5 i o =-20 a 4.4 4.5 4.4 4.4 6.0 i o =-20 a 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 i o =20 a 0.0 0.1 0.1 0.1 v 4.5 i o =20 a 0.0 0.1 0.1 0.1 6.0 i o =20 a 0.0 0.1 0.1 0.1 4.5 i o =4.0 ma 0.17 0.26 0.33 0.40 6.0 i o =5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i =v cc or gnd 0.1 1 1 a i cc quiescent supply current 6.0 v i =v cc or gnd 44080 a
m54hc165 6/12 ac electrical characteristics (c l = 50 pf, input t r =t f = 6ns) capacitive characteristics 1) c pd is defined as the value of the ic?s internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8 15 19 22 6.0 7 13 16 19 t plh t phl propagation delay time (clock - qh, q h) 2.0 55 150 190 225 ns 4.5 18 30 38 45 6.0 15 26 33 38 t plh t phl propagation delay time (shift/load - qh, q h) 2.0 65 165 205 250 ns 4.5 21 33 41 50 6.0 18 28 35 43 t plh t phl propagation delay time (h - qh, q h) 2.0 52 135 170 205 ns 4.5 17 27 34 41 6.0 14 23 29 35 f max maximum clock frequency 2.0 7.4 15 6.0 4.8 mhz 4.5 37603024 6.0 44713528 t w(h) t w(l) minimum pulse width (clock) 2.0 24 75 95 110 ns 4.5 6 15 19 22 6.0 5 13 16 19 t w(l) minimum pulse width (shift/load ) 2.0 32 75 95 110 ns 4.5 8 15 19 22 6.0 7 13 16 19 t s minimum set-up time (pi - shift/load ) (si - clock) (shift/load -ck) 2.0 24 75 95 110 ns 4.5 6 15 19 22 6.0 5 13 16 19 t h minimum hold time (pi - shift/load ) (si - clock) (shift/load -ck) 2.0 0 0 0 ns 4.5 0 0 0 6.0 0 0 0 t rem minimum removal time (clock - ck inh) 2.0 20 75 95 110 ns 4.5 5 15 19 22 6.0 4 13 16 19 symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 5.0 5 10 10 10 pf c pd power dissipation capacitance (note 1) 5.0 55 pf
m54hc165 7/12 test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r t =z out of pulse generator (typically 50 ? ) waveform 1: serial mode propagation delay (f=1mhz; 50% duty cycle)
m54hc165 8/12 waveform 2: parallel mode propagation delay (f=1mhz; 50% duty cycle) waveform 3: minimum pulse width (s/l ), propagation delay times (f=1mhz; 50% duty cycle)
m54hc165 9/12 waveform 4: setup and hold time (pi to s/l ) (f=1mhz; 50% duty cycle) waveform 5: minimum removal time (ck inh to ck) (f=1mhz; 50% duty cycle)
m54hc165 10/12 dim. mm. inch min. typ max. min. typ. max. a 2.1 2.71 0.083 0.107 a1 3.00 3.70 0.118 0.146 a2 0.63 0.88 1.14 0.025 0.035 0.045 b 1.82 2.39 0.072 0.094 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 d 20.06 20.32 20.58 0.790 0.800 0.810 e 7.36 7.62 7.87 0.290 0.300 0.310 e1 2.54 0.100 e2 17.65 17.78 17.90 0.695 0.700 0.705 e3 7.62 7.87 8.12 0.300 0.310 0.320 f 7.29 7.49 7.70 0.287 0.295 0.303 i 3.83 0.151 k 10.90 12.1 0.429 0.476 l 1.14 1.5 0.045 0.059 dilc-16 mechanical data 0056437f
m54hc165 11/12 dim. mm. inch min. typ max. min. typ. max. a 6.75 6.91 7.06 0.266 0.272 0.278 b 9.76 9.94 10.14 0.384 0.392 0.399 c 1.49 1.95 0.059 0.077 d 0.102 0.127 0.152 0.004 0.005 0.006 e 8.76 8.89 9.01 0.345 0.350 0.355 f 1.27 0.050 g 0.38 0.43 0.48 0.015 0.017 0.019 h 6.0 0.237 l 18.75 22.0 0.738 0.867 m 0.33 0.38 0.43 0.013 0.015 0.017 n 4.31 0.170 fpc-16 mechanical data 0016030e 1 8 16 f g d h a b m c n h 9 e l
m54hc165 12/12 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com

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